P25Q21H/11H/06H Datasheet Puya Semiconductor General Ÿ Single 2.3V to 3.60V supply Ÿ Industrial Temperature Range -40C to 85C Ÿ Serial Peripheral Interface (SPI) Compatible: Mode 0 and Mode 3 Ÿ Single, Dual and Quad IO mode - 2M/1M/512K x 1 bit - 1M/512K/256K x 2 bits - 512K/256K/128K x 4 bits Ÿ Flexible Architecture for Code and Data Storage - Uniform 256-byte Page Program - Uniform 256-byte Page Erase - Uniform 4K-byte Sector Erase - Uniform 32K/64K-byte Block Erase - Full Chip Erase Ÿ Hardware Controlled Locking of Protected Sectors by WP# Pin Ÿ One Time Programmable (OTP) Security Register - 3*512-Byte Security Registers With OTP Lock Ÿ 128 bit unique ID for each device Ÿ Fast Program and Erase Speed - 2ms Page program time - 8ms Page erase time - 8ms 4K-byte sector erase time - 8ms 32K-byte block erase time - 8ms 64K-byte block erase time Ÿ JEDEC Standard Manufacturer and Device ID Read Methodology Ÿ Ultra Low Power Consumption - 0.3uA Deep Power Down current - 9uA Standby current - 0.5mA Active Read current at 33MHz - 1.5mA Active Program or Erase current Ÿ High Reliability - 100,000 Program / Erase Cycles - 20-year Data Retention Ÿ Industry Standard Green Package Options - 8-pin SOP (150mil/208mil) - 8-land USON(3x2x0.55mm), (3x2x0.45mm), (3x4x0.55mm),(1.5x1.5x0.45mm) - 8-land WSON (6x5x0.75mm) - 8-pin TSSOP - KGD for SiP P25Q21H/11H/06H Datasheet Puya Semiconductor Page 5 of 77 2 Description The P25Q21H/11H/06H is a serial interface Flash memory device designed for use in a wide variety of high-volume consumer based applications in which program code is shadowed from Flash memory into embedded or external RAM for execution. The flexible erase architecture of the device, with its page erase granularity it is ideal for data storage as well, eliminating the need for additional data storage devices. The erase block sizes of the device have been optimized to meet the needs of today's code and data storage applications. By optimizing the size of the erase blocks, the memory space can be used much more efficiently. Because certain code modules and data storage segments must reside by themselves in their own erase regions, the wasted and unused memory space that occurs with large sectored and large block erase Flash memory devices can be greatly reduced. This increased memory space efficiency allows additional code routines and data storage segments to be added while still maintaining the same overall device density. The device also contains an additional 3*512-byte security registers with OTP lock (One-Time Programmable), can be used for purposes such as unique device serialization, system-level Electronic Serial Number (ESN) storage, locked key storage, etc. Specifically designed for use in many different systems, the device supports read, program, and erase operations with a wide supply voltage range of 2.3V to 3.6V. No separate voltage is required for programming and erasing

P25Q21H/11H/06H Datasheet Puya Semiconductor Single 2.3V to 3.60V supply Ÿ Industrial Temperature Range -40C to 85C Ÿ Serial Peripheral Interface (SPI) Compatible: Mode 0 and Mode 3 Ÿ Single, Dual and Quad IO mode - 2M/1M/512K x 1 bit - 1M/512K/256K x 2 bits - 512K/256K/128K x 4 bits Ÿ Flexible Architecture for Code and Data Storage - Uniform 256-byte Page Program - Uniform 256-byte Page Erase - Uniform 4K-byte Sector Erase - Uniform 32K/64K-byte Block Erase - Full Chip Erase Ÿ Hardware Controlled Locking of Protected Sectors by WP# Pin Ÿ One Time Programmable (OTP) Security Register - 3*512-Byte Security Registers With OTP Lock Ÿ 128 bit unique ID for each device Ÿ Fast Program and Erase Speed - 2ms Page program time - 8ms Page erase time - 8ms 4K-byte sector erase time - 8ms 32K-byte block erase time - 8ms 64K-byte block erase time Ÿ JEDEC Standard Manufacturer and Device ID Read Methodology Ÿ Ultra Low Power Consumption - 0.3uA Deep Power Down current - 9uA Standby current - 0.5mA Active Read current at 33MHz - 1.5mA Active Program or Erase current Ÿ High Reliability - 100,000 Program / Erase Cycles - 20-year Data Retention Ÿ Industry Standard Green Package Options - 8-pin SOP (150mil/208mil) - 8-land USON(3x2x0.55mm), (3x2x0.45mm), (3x4x0.55mm),(1.5x1.5x0.45mm) - 8-land WSON (6x5x0.75mm) - 8-pin TSSOP - KGD for SiP P25Q21H/11H/06H Datasheet Puya Semiconductor Page 5 of 77 2 Description The P25Q21H/11H/06H is a serial interface Flash memory device designed for use in a wide variety of high-volume consumer based applications in which program code is shadowed from Flash memory into embedded or external RAM for execution. The flexible erase architecture of the device, with its page erase granularity it is ideal for data storage as well, eliminating the need for additional data storage devices. The erase block sizes of the device have been optimized to meet the needs of today's code and data storage applications. By optimizing the size of the erase blocks, the memory space can be used much more efficiently. Because certain code modules and data storage segments must reside by themselves in their own erase regions, the wasted and unused memory space that occurs with large sectored and large block erase Flash memory devices can be greatly reduced. This increased memory space efficiency allows additional code routines and data storage segments to be added while still maintaining the same overall device density. The device also contains an additional 3*512-byte security registers with OTP lock (One-Time Programmable), can be used for purposes such as unique device serialization, system-level Electronic Serial Number (ESN) storage, locked key storage, etc. Specifically designed for use in many different systems, the device supports read, program, and erase operations with a wide supply voltage range of 2.3V to 3.6V. No separate voltage is required for programming and erasing